1. Field of the Invention
This invention relates to a substrate bias generator that includes a voltage doubler (or trippler) to provide a wide range of bias feedback voltage to compensate for threshold variation in the devices which form a MOS circuit.
2. Statement of the Prior Art
Conventional substrate charge pumps or bias voltage generators are known which convert a +5 volt power supply signal to a negative substrate bias voltage. By pumping charge into the substrate, compensation is provided for variations of both operating and processing parameters (e.g. temperature change, supply voltage fluctuations, substrate leakage, etc.), which variations could undesirably cause a shift in the intrinsic threshold levels of devices that form a MOS circuit.
The following U.S. patents are illustrative of the present state of the art with respect to substrate charge pumps and bias generators:
U.S. Pat. No. 3,609,414, Pleshko
U.S. Pat. No. 3,794,862, Jenne
U.S. Pat. No. 3,805,095, Lee et al
U.S. Pat. No. 3,806,741, Smith
U.S. Pat. No. 4,004,164, Crawford et al
Moreover, the following documents are listed to also indicate the present state of the art:
"Fast Mostek ROM," Electronics, Sept. 16, 1976, PP. 42 and 44.
"A Threshold Voltage Controlling Circuit for Short Channel MOS Integrated Circuits," Proceedings of the 1976 IEEE International Solid State Conference, Feb. 18, 1976, PP. 54-55.
"Substrate and Load Gate Voltage Compensation," Proceedings of the 1976 IEEE International Solid State Conference, Feb. 18, 1976, PP. 56-57.
"Speedy RAM Runs Cool With Power-down Circuitry," Electronics, Aug. 4, 1977, PP. 103-107.
However, the prior art substrate voltage generators typically provide a range of bias voltage that is insufficient to adequately regulate the threshold voltages of, especially, enhancement type field effect transistors, and, more particularly, those transistors that have their respective source electrodes connected to ground. As a result, the permissable variation of the initial threshold voltage and body constant of the transistors is undesirably limited, while power dissipation is increased.